Firewall product Matrix9 has a network security board named NSB. The NSB is built with an FPGA (Field Programmable Gate Array) chip. When customers require new features or new bugs are found, system functions need to be upgraded.
FPGA is a kind of chip which will lose functions when it is powered off. So typically after powered on, FPGA must be programmed by an EEPROM (Electrically Erasable Programmable Read-Only Memory) to have its functions. EEPROM contains bit files which provide FPGA functionality. By upgrading the bit files, the FPGA can be upgraded.
Due to large FPGA, such as XILINX's Virtex II 6000, the bit files are too big to be fitted into a single chip EEPROM. As such, multiple EEPROMs are used to store such huge bit files. Thus, a lot of EEPROMs will occupy valuable PCB space which will reduce the reliability. One conventional approach incorporates a CPLD (Complex Programmable Logic Device) and a FLASH memory to implement the function of this special EEPROM. The FLASH memory stores the bit files. The CPLD communicates with CPU to upgrade bit files in FLASH memory and also downloads the bit files to the FPGA to provide the FPGA with the functionality. Through this method, typically, there always has a very high reliable channel for software to write bit files to the FLASH memory. An example is the CPU's GPIO (General Purpose Input Output).
However, some systems do not include a GPIO channel. For example some systems use a PCI (Peripheral Component Interconnection) interface to talk with the CPU, but this PCI interface is implemented by the FPGA. As a result, if upgrading bit files through the PCI interface failed, these systems will lose functions totally without capability of being repaired.
As a result, there is a need to develop a robust and economic solution for FPGA upgrade.